Compact flash with nios II

kenson

Readme - Compact flash monitor/debug demonstration
2 t+ n- T4 U9 C  oGENERAL DESCRIPTION:
This distribution contains hardware and software examples suitable for
- l) {: D1 X7 I& `) j- U- Poperation of the the Compact Flash interface (True IDE mode) peripheral
included in the Nios II 5.0 development kit. This peripheral's register
4 {" g9 J( d/ u1 e3 y; ]map is equivalent to the compact flash interface previously posted to the
% P8 |0 l& x4 M% h: qwww.niosforum.com "Tested IP" area by Microtronix.
HARDWARE EXAMPLE DESIGNS
Included with this distribution are several hardware example designs
. K! K- w* G: k8 q0 X7 ~. Nillustrating how to connect Compact Flash pins to the I/O exported from
the peripheral. The examples supplied are pre-built and tested on the
# C' c# k2 ]3 L$ Q  U8 Gfollowing development boards:
; X, o( K8 x1 t+ M* T1 |: q - Nios Development Board, Cyclone Edition (EP1C20)
6 o' V+ ]; ^: f- I9 E( ?$ m7 ` - Nios Development Board, Cyclone II Edition (EP2C35)
* W4 e* F* u% h( G4 t - Nios Development Board, Stratix Edition (EP1S40)
- Nios Development Board, Stratix II ES Edition (EP2S60ES)
' u, V. n: Q: `% y, j! ?
For users of the Nios Development Board, Stratix Edition (EP1S10 or EP1S10ES
8 r- V: {6 A; y2 oAltera devices), it is suggested that you start with the EP1S40 example design
1 n) p& G0 l  V: qand change SOPC Builder board component & Quartus device assignment, and then
re-compile the design. Do not remove I/O assignments; the I/O assignments for
these three development boards are identical.
6 C: J0 a0 X1 j' C& Y! ]7 |. lIn addition, the the Quartus project setting (.qsf) files included with each of
2 p* @. O, ]7 Mthe above hardware examples includes pin-assignments for Compact Flash that you
8 J+ i$ K& d5 f2 r$ amay easily copy to your own custom design that uses Compact Flash.
  Z, p) Z5 P+ K3 l5 hNote: Hardware example designs in Nios II 5.0 included these same pin
assignments in each design.
SOFTWARE EXAMPLES
: u5 u8 _" s' q5 FThe software included in this package allows rudimentary IDE access to
Compact Flash, including debug routines, hot-swap capability, and
4 o( r* U& u& E/ X1 lthe ability to read/write compact flash in either LBA or CHS addressing
. Z" S/ N' ~9 q9 `3 a9 Imodes. No file system support is provided, though this example would
; |* ^% W; {* J0 S  }serve as a fine starting-point for a higher-level file-system interface.
* g4 X! J8 e0 U) O  qAdditional software support for the Compact Flash interface is included
9 o/ i$ U% \* m* \in the eCOS release for Nios II 5.0, and Micrium MicroC/FS file system,
3 B" f8 J4 L: F5 F3 f! T4 Yboth of which have been tested with the Compact Flash interface
peripheral. These software interfaces do NOT require the software included
with distribution, but may be used with the hardware example designs
included with this distribution.
To build the software example design, open the Nios II IDE, create a new Nios
! G; w- ^' J2 U9 n1 b$ f. III C/C++ application (it is suggested that you start with a template such as
"Hello World" or "Blank Project"), then, copy the source-files to the newly
created project directory and "refresh" the project contents in the IDE (F5).
. b3 V: K0 I" r( |Following this, you may build the application. The main() routine is located
- j9 {0 |, t+ E5 Cin file cf_test.c
+ w' q0 o9 m2 XNote: If you start with hello world, be sure to remove hello_world.c to prevent
5 k, _) X5 _6 Q7 g& S/ tconflicts during compilation.
$ U, b& t1 A& s$ LREQUIREMENTS:
The example software requires an altera_avalon_cf peripheral named "cf"
2 A) [: R% D$ x0 Ninstantiated in your SOPC Builder design. In addition, the default LCD
/ v: t5 w9 ]  ~' k8 ~/ d! m. `  x% Ginterface that is included in "standard" and "full_featured" Nios II example
designs may not be used, as it shares pins with the compact flash socket.
0 L% b3 W! c" F2 C7 o% mThe hardware example designs included with this distribution conform to the
3 o  c0 z: n+ Y" y/ F, Z# Zabove requirements.
/ Z/ N) J+ K8 E6 ], ]2 LKNOWN ISSUES & WORKAROUNDS:
% I, t( w; E+ \* d* B) ~, N& q# xEvery effort has been made to make both the Compact Flash interface peripheral
. R. `/ X; L# @' R5 @. o2 Pand software examples perform without flaws. However, certain known issues
$ m! P2 Y  e9 {: H8 T0 r6 ^may prevent Compact Flash card access.
+ K" K+ P& J$ g' DThe following are relevant excerpts from the Nios II 5.0 errata discussing
3 q$ u2 Z6 e8 ]! ]( c7 BCompact Flash:
# N# |1 P3 T+ A - Intermittent failures while accessing Compact Flash card
- u/ e( y9 F& G! M5 G+ S
2 B8 Y; B# R+ z    Nios II 5.0 includes a Compact Flash controller peripheral suitable for
2 y2 ~2 g$ Z0 k8 j    interfacing to Compact Flash cards in True IDE mode on Nios development
; K$ v& X! S' S+ y4 ~    boards. In order for True IDE mode to operate, Compact Flash cards require
6 n9 a" j, \/ u! p    that the "ATASEL_N" input be driven to ground during power-up.
    The Compact Flash controller peripheral includes a configurable power
0 X! t5 c  s9 e, D    register used to power-cycle Compact Flash cards in Nios II software
& e, r* I$ q# K7 i    through a MOSFET on the Nios development boards. However, in certain
) @7 t8 }- y% k  |; @8 _    development boards, power to the Compact Flash card will not be turned
; Q+ g" h' l& U4 z1 k- R; [& V    off completely during this power-cycle operation. Because of this, the
    "ATASEL_N" pin may not be sampled during the power-cycle operation after
    FPGA configuration when this pin is driven to ground. Instead, "ATASEL_N"
1 g/ c- {# A' F6 R3 P    may be sampled by the Compact Flash card when power is first applied to
) l+ `) H4 D) j# `+ D5 T& d    the development board, when I/O are not yet driven by the FPGA (before
* Y" C4 t. Z9 Y# X    FPGA configuration).
* D- S- p2 F2 W- c1 c: `    Workaround:  If you encounter errors with Compact Flash when using the
& i% C: t8 Z& C- `    Nios development boards, please try one of the following workarounds:
; s4 D- t9 }! X2 s! q3 r- S6 f5 g        * Try a different Compact Flash card -- Certain cards are more
& y" r8 ]/ S8 y) q          susceptible to the power-cycling issue than others.
        * Modify the Nios development board -- This is recommended for
          users who are familiar and comfortable with board-level
( z: A( t$ [& m8 p  V          modifications. Disconnect pin 9 (ATASEL_N) on the Compact Flash
7 m3 K6 s- b9 x# u8 v* G* x. Z          socket on your Nios Development Board and tie this pin to ground.
, f+ X1 t: ~' ?" z% y; `          Note that the Compact Flash socket uses a staggered numbering on
* ^( l- a- c1 a$ U, M! [  U          the pins (starting from pin 1: 1, 26, 2, 27, ...); please refer
% a. \: ^& C9 _/ C2 q          to the Compact Flash Association specification for right-angle
          surface-mount connectors for exact specifications on this connector.
          Caution: This will permanently enable True-IDE mode operation.
- Compact Flash card and LCD screen do not work concurrently
    If there is a Compact Flash card inserted in the development board, the
3 K! l( X& j# W4 I0 _5 H  ~    LCD and other devices connected to the PROTO1 header might not work.
2 G" X" j/ o; {/ B8 |" c    Workaround: Remove the Compact Flash card to ensure proper operation of
* D# M1 z5 l, n    the PROTO1 header, or vice versa.


. p8 N& S8 C8 Z4 z9 L9 @在网上找到一个相当不错的CF控制器有兴趣可以研究一下