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发表于 2019-3-1 15:18
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ZYNQ采用了结构指针加函数指针来实现复杂的功能还有它总之采用强制转换来实现类型转换,所以好多用了void *6 {# ]$ {. K0 g+ [9 u' Z5 g2 a
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#include <stdio.h>) l6 d8 ^. a2 E1 ^$ k
#include "xscugic.h"& d, G# u' j: c* m9 G0 S- ^7 i. O
#include "xil_exception.h"8 D7 s* `! f8 E8 o3 e
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#define INT_CFG0_OFFSET 0x00000C00
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* h0 A* o" S3 h5 s% E// Parameter definitions
; k* K8 S& |& v7 w0 p, Q4 V#define SW1_INT_ID 61
4 J0 I0 ^( A! M! r$ [& C6 D#define SW2_INT_ID 62
5 Q1 ]# p# V7 D3 ?0 e$ ^" W- V#define SW3_INT_ID 63- F- t& U) _! {) Q* v- k4 [
#define INTC_DEVICE_ID XPAR_PS7_SCUGIC_0_DEVICE_ID3 g# `; r6 _% Z5 y% l/ c2 ?: Z+ B
#define INT_TYPE_RISING_EDGE 0x03
" A8 f1 [8 m7 M# G/ ~- {5 R#define INT_TYPE_HIGHLEVEL 0x01
* Z+ e; U9 b, v% P: s. i7 a; a#define INT_TYPE_MASK 0x03
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static XScuGic INTCInst;# T: B5 U. G- d% J1 B2 ~' b
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static void SW_intr_Handler(void *param);
5 _ H1 V0 m) Ystatic int IntcInitFunction(u16 DeviceId);
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. w+ s ^$ m7 F- V/ n2 nstatic void SW_intr_Handler(void *param)
) V/ E# ]+ r2 L{
' V i6 |8 x) R; p5 r int sw_id = (int)param;
5 ]0 | ]" k! h& y1 r1 J printf("SW%d int\n\r", sw_id);
: m6 ~6 y9 v) T}
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! Q2 q4 U! P7 Q- p4 H9 F& [( n+ ~9 nvoid IntcTypeSetup(XScuGic *InstancePtr, int intId, int intType) y6 @% Z6 i3 y% z9 Z: @% p8 o# h
{
* j! P( t" A) L) S/ n' a; D1 \ int mask;
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intType &= INT_TYPE_MASK;* x6 j% ]( l2 Y, q2 P# {
mask = XScuGic_DistReadReg(InstancePtr, INT_CFG0_OFFSET + (intId/16)*4);
8 {4 [/ b6 `/ \$ n mask &= ~(INT_TYPE_MASK << (intId%16)*2);+ e( c5 p' o6 B2 ] C- J, I; ?
mask |= intType << ((intId%16)*2);& o7 p( f* E# z
XScuGic_DistWriteReg(InstancePtr, INT_CFG0_OFFSET + (intId/16)*4, mask);4 [6 D G4 d" U1 S# S r
}
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int IntcInitFunction(u16 DeviceId)
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" N- M4 N( f. x" y! ]5 Q XScuGic_Config *IntcConfig;
: j1 ]9 V' Q& x int status;
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// Interrupt controller initialisation4 |3 p8 h& r% X X
IntcConfig = XScuGic_LookupConfig(DeviceId);2 R( P6 u# k: _) F6 a" _* k
status = XScuGic_CfgInitialize(&INTCInst, IntcConfig, IntcConfig->CpuBaseAddress);6 r: \* ~! I! ^
if(status != XST_SUCCESS) return XST_FAILURE;
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4 H* i2 j7 ]% z6 n // Call to interrupt setup
& C* v' w2 S5 x Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
5 h; s- i7 z1 e- e, r7 I (Xil_ExceptionHandler)XScuGic_InterruptHandler,
( }/ o8 f' Q2 ~2 T N &INTCInst);
5 V" ]# \% {) ^: X. i5 A( s; ^/ { Xil_ExceptionEnable();9 Y3 u+ C( L- p# B# I+ X0 u
; [) t# E& E# A5 i; _ // Connect SW1~SW3 interrupt to handler! R! K% X5 `, O2 E9 E* U2 g( ~5 i+ I
status = XScuGic_Connect(&INTCInst,
: v$ D" N* M6 }* A$ z% E# w SW1_INT_ID,
/ k0 x3 l) _4 e1 ~' |( ] (Xil_ExceptionHandler)SW_intr_Handler,
! F7 \! I+ T# O (void *)1);
9 D( C$ b% k9 X% t7 s if(status != XST_SUCCESS) return XST_FAILURE;5 s+ v$ k$ E; e5 A
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status = XScuGic_Connect(&INTCInst,
$ f9 ?. w* N N SW2_INT_ID,7 B& N4 A }) [: _1 q
(Xil_ExceptionHandler)SW_intr_Handler,
6 U H4 g; h: v q (void *)2);( C8 V: b' Z& e6 J0 J( n" ]
if(status != XST_SUCCESS) return XST_FAILURE;
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1 o1 q. [% p" [' L status = XScuGic_Connect(&INTCInst,
, l7 [: j$ o# p$ B0 n2 g: W SW3_INT_ID,
& `; V4 @( A! i# |1 B, \; p& f (Xil_ExceptionHandler)SW_intr_Handler,
9 }& L' _' O5 G% x# {. @. l (void *)3);
! B' Z6 ` ~/ [9 H8 O4 T if(status != XST_SUCCESS) return XST_FAILURE;
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7 z7 F- R4 t5 m& J0 \7 }& v // Set interrupt type of SW1~SW3 to rising edge! T) q6 G5 B+ A( s
IntcTypeSetup(&INTCInst, SW1_INT_ID, INT_TYPE_RISING_EDGE);# ], i% I) G# Y8 u
IntcTypeSetup(&INTCInst, SW2_INT_ID, INT_TYPE_RISING_EDGE);7 ?+ Z" r# s: S. ^
IntcTypeSetup(&INTCInst, SW3_INT_ID, INT_TYPE_RISING_EDGE);
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// Enable SW1~SW3 interrupts in the controller
" o0 q6 B+ m9 ? r XScuGic_Enable(&INTCInst, SW1_INT_ID);
8 T9 p* m; r& }% m% ] XScuGic_Enable(&INTCInst, SW2_INT_ID);/ H: ?& Z7 V8 |3 c- q
XScuGic_Enable(&INTCInst, SW3_INT_ID);
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. ~0 p) c' \& O return XST_SUCCESS;$ O: b& \5 m3 m6 C$ f
}
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! g3 e2 y6 u) Y0 ]* L8 x% k5 Qint main(void)
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5 l/ k4 }7 b. }+ \# q, B print("PL int test\n\r");" L6 b( T* b7 Z" e- B$ X% U
IntcInitFunction(INTC_DEVICE_ID);& w: ^2 p0 b$ r( |2 r( J. [
while(1);! ^" z6 x3 S. q- ?
return 0;2 d$ h+ w6 ?2 [4 M8 Q' n2 M
}
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