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JP1(2,3) Full Power Management Jumper—Standard setting: full power management is enabled when
the jumper is placed on pins 2 and 3 at power-on reset. Pin 2 also acts as the interface for the
SMBA1 signal when a SMBus host is connected to the TUSB8040. The TUSB8040 has an internal
pull up on this terminal, so the TUSB8040 actually defaults to a non full power management state
which is the lowest cost implementation with no active downstream port switching. Removing the
jumper enables the default mode.
JP2(np) SMBUSz Jumper—Standard setting: not populated, I2C interface mode is enabled via the
internal pull-up resistor at power-on reset. If the jumper is placed on pins 2 and 3 at power-on reset,
SMBUS mode is enabled.
JP3(np) Battery Charging Jumper—Standard setting: not populated, battery charging is disabled via the
internal pull-down resistor. If the jumper is placed on pins 1 and 2, battery charging on the
downstream ports is enabled. This signal also acts at the active low power enable/disable for the
downstream port power switches.
JP4(np) Serial Clock Jumper—Standard setting: not populated, the internal pull-down resistor indicates
that no EEPROM is attached. A pull up resistor is connected to the serial clock terminal to indicate
that an I2C EEPROM is attached. Pin 2 also acts as the interface for the SMBCLK signal when a
SMBus host is connected to the TUSB8040.
JP5(np) Serial Data Jumper—Standard setting: not populated, the internal pull-down resistor indicates
that no EEPROM is attached. A pull up resistor is connected to the serial clock terminal to indicate
that an I2C EEPROM is attached. Pin 2 also acts as the interface for the SMBDAT signal when a
SMBus host is connected to the TUSB8040. The SDA_SMBDAT terminal of production TUSB8040
will be sampled at the deassertion of reset to determine if the USB 3.0 SuperSpeed low power
states U1 and U2 are disabled. If SDA_SMBDAT is high, U1 and U2 low power states are disabled.
If SDA_SMBDAT is low, U1 and U2 low power states are enabled. If the optional EEPROM or
SMBUS is implemented, the value of the u1u2Disable bit of the Device Configuration Register
determines if the low power state U1 and U2 are enabled.
JP7(1,2) Power On Jumper—Standard setting: downstream power management is controlled by the
PWRON0z_BATEN output of the TUSB8040. If the jumper is placed on pins 2 and 3, downstream
port power is always enabled. The always enabled mode should be used when the Full Power
Management setting is disabled by the removal of JP1 from pins 2 and 3.
JP8(1,2) 5-V Source Jumper—Standard setting: board 5 V is sourced from the provided 5-V, 4-A DC
wall power input. The ability to source board 5 V from upstream VBUS by placing the jumper on
pins 2 and 3 is a lab test option only, the TUSB8040 does not support bus power operation. |
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