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楼主: Siagfried

免费送TUSB8040EVM的亚克力外壳了,要的来报道

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发表于 2013-9-8 17:35 | 显示全部楼层
TUSB8040EVM  哪里有卖呀
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发表于 2013-9-9 03:37 | 显示全部楼层
可惜没抢到哦。。。。楼主好人。。。顶了!
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发表于 2013-9-9 12:05 | 显示全部楼层
上午收到TPS2561,焊上去可以正常使用,1.5A左右过流保护。这板不另配电源是不行了,本身耗电670ma左右,准备用两个堆成7口,加个5V电源。

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请问是什么情况下耗电流670mA,我的不接设备都有475mA,不知道是否正常  发表于 2013-9-12 11:23
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发表于 2013-9-9 12:52 | 显示全部楼层
wm20031015 发表于 2013-9-9 12:05
上午收到TPS2561,焊上去可以正常使用,1.5A左右过流保护。这板不另配电源是不行了,本身耗电670ma左右,准 ...

能上个图文焊接教程么?


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 楼主| 发表于 2013-9-9 16:40 | 显示全部楼层
mitcher 发表于 2013-9-9 12:52
能上个图文焊接教程么?

能不能再详细解释一下几个跳线的作用啊

俺英文是体育老师教的…………
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发表于 2013-9-9 22:16 | 显示全部楼层
焊接 用风枪就好了 简单吧。。。
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发表于 2013-9-10 10:12 | 显示全部楼层
Siagfried 发表于 2013-9-9 16:40
能不能再详细解释一下几个跳线的作用啊

俺英文是体育老师教的…………

• D1 – Indicates that the upstream USB port is connected at High-speed.
• D2 – Indicates that the upstream USB port is connected at SuperSpeed.
• D3 – Indicates that the upstream USB port has entered a High-speed suspend state.
• D4 - Indicates that the upstream USB port has entered a SuperSpeed suspend state.
• D5 – Indicates when VBUS is provided to the upstream USB port.
• D6 – Indicates that 5V is being applied to the TUSB8040 REV B EVM.
• D7, D8, D10, D11 – Indicate when VBUS is applied to the downstream USB ports. The TUSB8040
REV B EVM enables or disables power to all downstream USB ports simultaneously.
• D9 – Indicates BOARD_3P3V is active.

补充内容 (2013-9-10 10:20):
怎么不能编辑了啊
D1 指示灯 上行usb高速 应该指2.0的速度
d2 指示灯 上行usb是super速。。。应该只得是3.0的速度
d3 上行进入高速中止状态 2.0情况下,这个没看明白
d4 上行进入中止状态 3.0情况下


补充内容 (2013-9-10 10:24):
d5 当vbus提供给上行usb口
d6 5v提供给板子。
d781011 当vbus提供给下行usb口,板子允许或不允许电源同时给下行usb口
d9指示板子3p3v活动的,不懂。
我英语更不好。

补充内容 (2013-9-10 10:24):
我英语更不好
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发表于 2013-9-10 10:12 | 显示全部楼层
Siagfried 发表于 2013-9-9 16:40
能不能再详细解释一下几个跳线的作用啊

俺英文是体育老师教的…………

JP1(2,3) Full Power Management Jumper—Standard setting: full power management is enabled when
the jumper is placed on pins 2 and 3 at power-on reset. Pin 2 also acts as the interface for the
SMBA1 signal when a SMBus host is connected to the TUSB8040. The TUSB8040 has an internal
pull up on this terminal, so the TUSB8040 actually defaults to a non full power management state
which is the lowest cost implementation with no active downstream port switching. Removing the
jumper enables the default mode.
JP2(np) SMBUSz Jumper—Standard setting: not populated, I2C interface mode is enabled via the
internal pull-up resistor at power-on reset. If the jumper is placed on pins 2 and 3 at power-on reset,
SMBUS mode is enabled.
JP3(np) Battery Charging Jumper—Standard setting: not populated, battery charging is disabled via the
internal pull-down resistor. If the jumper is placed on pins 1 and 2, battery charging on the
downstream ports is enabled. This signal also acts at the active low power enable/disable for the
downstream port power switches.
JP4(np) Serial Clock Jumper—Standard setting: not populated, the internal pull-down resistor indicates
that no EEPROM is attached. A pull up resistor is connected to the serial clock terminal to indicate
that an I2C EEPROM is attached. Pin 2 also acts as the interface for the SMBCLK signal when a
SMBus host is connected to the TUSB8040.
JP5(np) Serial Data Jumper—Standard setting: not populated, the internal pull-down resistor indicates
that no EEPROM is attached. A pull up resistor is connected to the serial clock terminal to indicate
that an I2C EEPROM is attached. Pin 2 also acts as the interface for the SMBDAT signal when a
SMBus host is connected to the TUSB8040. The SDA_SMBDAT terminal of production TUSB8040
will be sampled at the deassertion of reset to determine if the USB 3.0 SuperSpeed low power
states U1 and U2 are disabled. If SDA_SMBDAT is high, U1 and U2 low power states are disabled.
If SDA_SMBDAT is low, U1 and U2 low power states are enabled. If the optional EEPROM or
SMBUS is implemented, the value of the u1u2Disable bit of the Device Configuration Register
determines if the low power state U1 and U2 are enabled.
JP7(1,2) Power On Jumper—Standard setting: downstream power management is controlled by the
PWRON0z_BATEN output of the TUSB8040. If the jumper is placed on pins 2 and 3, downstream
port power is always enabled. The always enabled mode should be used when the Full Power
Management setting is disabled by the removal of JP1 from pins 2 and 3.
JP8(1,2) 5-V Source Jumper—Standard setting: board 5 V is sourced from the provided 5-V, 4-A DC
wall power input. The ability to source board 5 V from upstream VBUS by placing the jumper on
pins 2 and 3 is a lab test option only, the TUSB8040 does not support bus power operation.
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发表于 2013-9-10 10:29 | 显示全部楼层
玛雅。饭不明白了。等高人吧
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发表于 2013-9-10 16:24 | 显示全部楼层
英语也不行,但经常受坛友的帮助,难得能贡献一回,照着字典查呀查,翻译了上面一段话,大家有更合适的专业术语翻译什么的,帮忙指出啊:)
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